Veriest Hungary Kft.
As a Verification Engineer, you will be part of an experienced engineering team. You will develop simulation-based environments to stimulate and check the behaviour of digital logic designs (HDL). This is a carrier where you will need all your critical and analytic thinking.
Job description:
– Understanding digital design functional specifications
– Create verification plans
– Developing verification environments
– Reach all the verification goals with simulations
– Analyse results and report bugs
– Communicate with customers and other engineering teams
Job requirements:
– B.Sc. or M.Sc. in Electrical Engineering or Software Engineering
– Knowledge in digital design techniques and HDL language(s) (VHDL, Verilog)
– Knowledge of Object-Oriented Paradigms
– Problem solving attitude and good analytical thinking
– Good communication skills
– Proficiency in English language, both written and verbal
Advantages:
– Experience in verification languages like SystemVerilog or Specman e
– Knowledge of verification methodologies like UVM or eRM
– Experience with digital design and verification tools
– Knowledge of dev tools and script languages such as Python, Perl, Tcl, Bash
We invite you to be part of a global company with a wealth of experience in the forefront of semiconductor technology. We commit for your professional growing and new challenges, provide a fun and dynamic environment as well as balance between work and home.
Are you looking for your next challenge?
This is your opportunity to join us!
Please send your CV to info@veriests.com
You can visit on our website www.veriests.com
You can find our Budapest office in MillPark Business Center, 1095, Budapest, Soroksári str. 44. 2nd Floor.
